Overview of TASKING Compiler technology

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An embedded compiler is the silent engine under the hood of the entire software development tools-suite. You should only notice it's there - and realise its crucial role in the process - when it does not do what you want it to do. For over 10 years, TASKING's current proprietary embedded compiler technology has been the silent engine running thousands of our tools-suites. TASKING compilers have been used to build thousands of applications for a wide range of microcontrollers, microprocessors and DSPs.

Optimisation
The secret of a good compiler lies in its ability to efficiently map the user's input source program to the instruction-set of a target processor, while preserving the semantics and functionality of the program. This efficiency is extremely important for small, embedded systems with limited memory or CPU registers available for the compiler to use. TASKING has developed its own proprietary compiler technology for this purpose permitting us to exploit new techniques for achieving the optimal fit between the compiler and the target architecture. The average TASKING compiler uses almost 50 optimisation techniques to reduce code size and/or execution time. A few common techniques include:

Dead assignment elimination
Removal of assignments to objects that are not used thereafter.
Leaf function handling
Leaf functions (function not calling other functions) are handled in a special way with respect to stack frame or CPU register allocation, avoiding register/stack spilling.
Register Caching
Reducing memory accesses by optimising variables in registers impacts program performance drastically, especially when this optimization can be applied in loops. The compiler postpones writing a new value to the memory location associated with a variable, but keeps it in a register instead.
Loop Unrolling
Code executes faster when several loop iterations are performed in one cycle. This optimisation increases code size. The code for the body of the loop is copied several times to reduce the number cycles. This optimisation is very powerful for small loops. In those situations the flow code (testing and branching) takes up a high percentage of the total code for the loop. In hardware loops this optimisation is disabled.
Peephole optimizations
The generated assembly code is improved by replacing instruction sequences by equivalent but faster and/or shorter sequences, or by deleting unnecessary instructions.

Processor Specific Extensions
In addition to these standard techniques, powerful C/C++ programming add-on's have been developed that allow software developers to get the maximum out of a target processor. Every target processor is supported by its own set of carefully designed and tuned language extensions, memory models, pragmas, inline functions and assembly inline techniques.

Processor specific embedded language extensions follow the rules of programming language specifications -- such as ANSI C -- and are intended to use processor features such as interrupt handling, 8-bit arithmetic, fixed point arithmetic, memory banking, memory addressing etc. in an application program. It combines the advantages of programming in C/C++ with the efficiency of assembly programming.

Mixing C/C++ and Assembly Language
Inline functions follow a familiar concept, where in this case a set of pre-defined functions is available in the compiler. Each of these functions translates to a very small assembly sequence (usually one instruction), without the overhead normally involved when using functions. It's a convenient and efficient way to make use of special arithmetic instructions for example.

The compiler technology offers powerful mechanisms for mixing assembly code with C/C++ code, including parameter passing for referencing HLL objects in assembly and the use of pseudo-registers instead of hard-coded ones that would break the code generator register assignment strategy. The result is an excellent integration of generated versus hand-coded assembly code.

Pragmas
Finally the use of pragmas in C/C++ programs makes it possible to change compiler settings during the compilation process. For example, one part of the application should be compiled for execution speed, while another part should be compiled for minimal code size.

Compiler Evolution

Today's TASKING is the culmination of 25 years of compiler innovation. Industry leading names like Intermetrics, BSO, and Whitesmiths are part of the TASKING heritage. TASKING continue to be true to this legacy by creating new excitement in compiler technology.

TASKING's new compilers are being designed with specific support for the semiconductor technology of preference for embedded communication applications - DSPs, embedded communication microcontrollers and reconfigurable RISC cores. Specific features to look for include:

  • Language extensions to support DSP (including fractional and complex) datatypes, addressing modes, saturation, circular buffers, storage qualifiers and operators.
  • Easy integration of C, C++ with assembly code (including legacy code).
  • Advanced/Profile directed Optimisations:
  • Loop reconstruction, prepare for vectorisation
  • Application-wide scope for optimisations
  • Latest scheduling techniques for VLIW-like architectures

The new TASKING compiler is one that uses an extensible target description language to generate the mechanics of a target compiler automatically. This will enable TASKING to provide emerging semiconductor technology with high quality, high performance tools more quickly. Another benefit of this new architecture is the modular nature of the compiler. The new modular framework takes a revolutionary approach to adaptability, as it allows full customisation of its optimisation processes. All modules that are part of the code generation process - including all optimisation modules - communicate via an internal target-independent compiler protocol. This well-defined interface between modules allows us to present to developers of SOC and other configurable core-based silicon an easily customizable compiler. Third parties will be able to easily add proprietary optimisation modules allowing for project-based compiler tuning.

TASKING also plans to add features to speed application development. These will include mechanisms that invoke the latest methodologies in automated completeness verification, modular testing, application-wide optimisation analysis and assembler/disassembler generation. An additional innovation to help speed development will produce very efficient code for your application, based on the knowledge of the commercial off-the shelf communication protocol products and operating systems you are using. This does not only give you the smallest and tightest code possible, but it also helps you to write and debug your code much faster.

Page Last Updated: November 28, 2002 11:08

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