PCI
Express architecture is a state-of-the-art serial interconnect
technology that keeps pace with recent advances in processor and memory
subsystems.
From its initial
release at 0.8V, 2.5GHz, the PCI Express technology roadmap will
continue to evolve, while maintaining backward compatibility, well into
the next decade with enhancements to its protocol, signaling,
electromechanical and other specifications.
The
PCI Express architecture retains the PCI usage model and software
interfaces for investment protection and smooth development migration.
The technology is aimed at multiple market segments in the computing
and communication industries, and supports chip-to-chip, board-to-board
and adapter solutions at an equivalent or lower cost structure than
existing PCI designs.
PCI
Express currently runs at 5Gbps, or 500MBps per lane in each direction,
providing a total bandwidth of 16GBps in a 16-lane configuration. PCI
Express provides I/O attach points for high-performance graphics,
1394b, USB 2.0, InfiniBand™ Architecture, Gigabit networking and so on. |
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